TSMC Q4 profit expected to hit record $15.2b

TSMC is expected to report a 28% rise in Q4 net profit to a record T$479.1 billion (US$15.2 billion) on December 15, driven by demand for AI infrastructure, according to an LSEG SmartEstimate of 19 analysts.

The Taiwan-based company, the world’s largest contract chipmaker and a supplier to Nvidia and Apple, recently posted a 20.5% jump in Q4 revenue that beat market forecasts.

Analysts say TSMC is benefiting more from the AI boom than other chip foundries.

TSMC is investing US$165 billion in chip factories in Arizona and may expand further in the US, according to US officials and reports.

TSMC shares rose 44.2% last year and are up 10% so far in 2026.

🔗 Source: Reuters

🧠 Food for thought

Implications, context, and why it matters.

Advanced packaging caps AI revenue growth at TSMC

Q4 net profit is set to rise 28% to $15.2 billion 1. CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging connects multiple chips on a high-bandwidth interposer, is running full, and some orders moved to ASE (Advanced Semiconductor Engineering) plus Amkor 1.
3nm wafer output is on track to top 200,000 a month by end 2026 2, while CoWoS capacity reaches only 127,000 a month in 2026 3. That gap slows packaging for AI accelerators (specialized processors for training and running AI models).
Over 85% of CoWoS capacity is tied to large customers such as NVIDIA, which takes 60% of global CoWoS demand 4. Smaller AI chipmakers face a barrier to entry, so TSMC captures less revenue from newer accounts.

Packaging shortages open doors for OSATs and alternative suppliers

Non-TSMC houses lifted 2026 plans by over 50% to 40,000 wafers a month, as OSATs (Outsourced Semiconductor Assembly and Test companies) add 2.5D lines that integrate chiplets side by side on a silicon interposer 3. ASE posted Q3 revenue of $5 billion, up 9% year over year, helped by spillover CoWoS-S (a substrate-based CoWoS variant) orders and AI or high-end mobile demand 3.
Intel’s EMIB (Embedded Multi-die Interconnect Bridge) offers a cheaper path versus CoWoS for mid-range AI chips and ASICs (application-specific integrated circuits). Google plans a TPU v9 trial on EMIB in 2027 4, creating openings for investors and suppliers tied to Intel and Amkor in South Korea, Portugal and the US 4.
Advanced packaging is set to overtake traditional packaging in 2025 and reach $78.6 billion by 2028, a 10.6% compound annual growth rate 4. Samsung plans 3.3D packaging, a hybrid 2.5D or 3D chip stacking approach, for mass production in Q2 2026 4. That offers diversification for equipment makers and materials vendors beyond TSMC’s CoWoS dominance.