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TSMC profit rises 39.1% to $14.8b in Q3 2025

TSMC reported Q3 2025 revenue of NT$989.92 billion (US$33.1 billion), with net income at NT$452.3 billion (US$14.76 billion) and diluted earnings per share at NT$17.44 (US$0.57).

The Taiwan-based chipmaker saw revenue rise 30.3% year-on-year and 6% from Q2, while net income increased 39.1% year-on-year and 13.6% quarter-on-quarter.

Gross margin stood at 59.5%, operating margin at 50.6%, and net profit margin at 45.7% for the quarter.

Sales of 3-nanometer chips accounted for 23% of total wafer revenue, 5-nanometer for 37%, and 7-nanometer for 14%.

Advanced technologies, defined as 7-nanometer and below, made up 74% of wafer revenue.

For Q4 2025, TSMC expects revenue between US$32.2 billion and US$33.4 billion, with gross margin forecast at 59% to 61% and operating margin at 49% to 51%.

🔗 Source: TSMC

🧠 Food for thought

Implications, context, and why it matters.

CoWoS capacity growth sustains TSMC’s AI revenue

  • Q3 2025 revenue reached $33.10 billion, with High Performance Computing (HPC) and AI at about 60% 12. The bottleneck moved from fabs to advanced packaging, with CoWoS (Chip-on-Wafer-on-Substrate) tight 2. TSMC targets 70,000–80,000 wafers per month by end-2025, then 100,000 in 2026 2. Q4 gross margin of 59–61% depends on easing this limit as Nvidia, AMD, and hyperscalers vie for slots 12.
  • Nvidia’s Blackwell needs about 3.3× more CoWoS reticle area than prior chips, while Rubin needs 4.0× more 2. A reticle is the lithography field that patterns interposers and redistribution layers, so more area means fewer units per pass. New 2025 lines plus Amkor, a major outsourced semiconductor assembly and test (OSAT) provider, are needed to turn wafers into AI shipments 2.

Capex will lift equipment and materials suppliers

  • TSMC plans $40–42 billion in 2025 capital expenditures (capex) 1. About 70% targets advanced nodes, 10–20% specialty, with the rest for advanced packaging 1. It is building six wafer plants, two advanced packaging sites, and a Research and Development (R&D) center in Arizona 3. This is the largest simultaneous fab build in industry history 3.
  • CoWoS output rising from about 13,000 wafers per month in 2023 to more than 100,000 in 2026 drives orders for 2.5D or 3D packaging tools 2. Materials suppliers preparing for 2-nanometer production, slated for volume in late 2025 with more tape-outs than N5 or N3 at similar stages, can time capacity and pricing 3.

Recent TSMC developments

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