TSMC to build new 2nm chip plants in Taiwan

TSMC will build three new 2-nanometer chip factories in Taiwan, according to local media reports.

The factories are set to be constructed in Tainan’s Southern Science Park, with a projected investment of about NT$900 billion (US$28 billion).

TSMC, the world’s largest semiconductor foundry, is increasing its total locations for 2-nanometer production from seven to 10 as demand for AI chips rises.

Construction could begin as early as next year, and the site will cover 40 hectares.

The industry expects TSMC’s monthly 2-nanometer production capacity to reach up to 90,000 wafers by the end of 2026, doubling current output.

🔗 Source: The Chosun Daily

🧠 Food for thought

Implications, context, and why it matters.

Industry-estimated 90,000 wafers per month (wpm) 2nm target depends on customer readiness and yield maturity

TSMC could hit 90,000 wafers per month by late 2026, yet its two Taiwan sites have 2nm slots sold out for that year, with pilot yields (share of usable chips per wafer) near 70% 1. Apple reportedly locked more than half of the first wave 1, and Qualcomm plus MediaTek aim to move to 2nm next year 2.
N2 brings nanosheet gate-all-around transistors, which wrap the gate around the channel to cut leakage and improve control. Backside power delivery routes power on the wafer back side to reduce resistance and voltage drop, with rollout expected after first-gen N2 3. Performance can rise 10–15% at iso-power or power can fall 25–30% at iso-performance versus N3E 4. Trial runs reached 60% yield 2, below the roughly 70% pilot rate 1.
AI work has pushed more 2nm tapeouts in the first two years than 3nm or 5nm over comparable windows, which supports expansion 2.

Advanced packaging suppliers can capture overflow as CoWoS remains bottlenecked

Global Chip-on-Wafer-on-Substrate (CoWoS) need could hit 1 million wafers in 2026 5. TSMC may reach 93,000 wafers per month by late 2026 6, about 1.1 million a year. Output spans TSMC and outsourced semiconductor assembly and test (OSAT) partners, which leaves share for these shops.
ASE is building CoWoS front-end capacity with its Kaohsiung K28 facility finishing in 2026, while SPIL is putting billions into Taiwan for CoWoS lines 7. Both work with TSMC and can take overflow from customers such as AMD, which plans 105,000 CoWoS wafers 5.
Cloud AI semiconductors are growing 40–50% year over year through 2026 6. Fan-out panel-level packaging (FOPLP) draws new spending from Innolux, a Taiwan-based display and panel manufacturer, and Powertech, a major OSAT known as PTI 8. Utechzone, a Taiwan-based equipment provider for panel-level and lithography processes, is investing.