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TSMC brings 3nm chips to Japan in $17b AI supply bet
TSMC is expected to start mass production of 3-nanometer wafers in 2028 at its second chip plant in Japan, according to a Taiwanese government filing.
The second plant would have monthly capacity of 15,000 12-inch wafers using 3-nanometer process technology.
TSMC had previously planned for its Japan expansion to focus on less advanced processes, and in 2024 it said total investment in the first two plants would exceed US$20 billion.
Local media estimate the second plant’s investment could roughly touch US$17 billion.
TSMC’s first Japan plant began volume production in late 2024, and its local unit Japan Advanced Semiconductor Manufacturing (JASM) was set up in 2021 with Sony, Denso, and Toyota as minority investors.
🔗 Source: Reuters
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Implications, context, and why it matters.
Japan subsidies and faster approvals help draw TSMC leading-edge chip work
- TSMC plans to run its 3-nanometer process at its second Japan fab. CEO C.C. Wei linked the move to rising global demand for artificial intelligence 1.
- Japan will add up to ¥732 billion (US$4.86 billion) in subsidies for TSMC’s second chip plant in Kumamoto. The aim is a steady supply of advanced chips 2.
- In Arizona, TSMC has adjusted timelines, moving the start of its second fab to 2027 3.
- Japan’s economy minister cited the country’s fast rollout as a reason to spend heavily during a global subsidy race 2.
Subsidy competition reshapes supply chains and regional chip capacity
- The Kumamoto buildout fits a wider push where governments use large grants to reduce supply chain risk and grow domestic chip production 4.
- The U.S. CHIPS and Science Act allocates about US$52.7 billion for direct subsidies and tax incentives. The EU Chips Act aims to mobilize €43 billion in public-private investment 4.
- Spending is steering projects into focused hubs. TSMC’s Dresden joint venture targets automotive and industrial chips, while Japan pursues capacity from mature nodes to advanced processes 4.
- Bringing 3-nanometer production to Japan would be a big jump, since claims put its most advanced domestic logic technology at 40-nanometer 5.
Recent TSMC developments
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