US chip design software firm Synopsys and Singapore’s Agency for Science, Technology and Research (ASTAR) signed a memorandum of understanding on September 9 to work on semiconductor packaging and simulation technologies through ASTAR’s Institute of Microelectronics (IME).

The work will run through the ASTAR IME–Ansys Joint Innovation Consortium for Semiconductor Excellence.

The initial phase will focus on mechanical design, modeling, and analysis for advanced packaging and chiplet-based architectures.

The aim is to assess semiconductor package performance before physical prototyping and address warpage, thermo-mechanical stress, solder joint reliability, and moisture-induced failures.

Synopsys said it would provide trial licenses for Ansys simulation software to ASTAR IME and up to 10 consortium member companies.

IME will lead consortium-based research and development, training programs, and seminars.

IME, part of ASTAR, focuses on areas including advanced packaging and heterogeneous integration.

Singapore’s semiconductor strategy highlights advanced packaging and testing for AI, 5G, and high-performance computing.

🔗 Source: Synopsys, Inc.

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