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Samsung plans 2nm chip upgrade for next-gen AI memory
Samsung Electronics said on July 27 that it plans to use its 2-nanometer process for the base die of its future eighth-generation high-bandwidth memory, or HBM5, for AI semiconductors.
In an interview published by Samsung Electronics’ Semiconductor Newsroom, foundry executive Koo Ja-geum said HBM5 is expected to process data more than 50% faster than HBM4E.
Samsung plans to use a 2nm Gate-All-Around base die and finer through-silicon vias (TSVs) to improve speed and power efficiency.
🔗 Source: Chosun Daily
Recent Samsung Electronics developments
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