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Nvidia rival Cerebras hits $23b after Tiger Global-led $1b round

Cerebras Systems, a Silicon Valley AI chip startup, raised US$1 billion in a late-stage funding round that valued the company at US$23 billion.

The round was led by Tiger Global, with participation from Benchmark, Coatue, and 1789 Capital.

This was the company’s second billion-dollar raise since September, when it was valued at US$8.1 billion.

The company is known for its wafer-scale engine chips used for AI training and inference.

The funding highlights strong investor interest in AI hardware, as Cerebras positions itself as a potential rival to Nvidia and AMD.

Reuters earlier reported that OpenAI is exploring alternatives to Nvidia, including Cerebras, which announced a commercial deal with OpenAI in January.

🔗 Source: Reuters

🧠 Food for thought

Implications, context, and why it matters.

OpenAI’s Cerebras agreement puts big money on fast, specialized inference

  • OpenAI signed a multi-year agreement to deploy 750 megawatts of Cerebras systems for its customers. Multiple outlets value it at more than $10 billion 1.
  • The added capacity supports AI inference, which runs models, not training 2.
  • The setup aims at use cases that need near-instant responses, including coding assistants plus AI agents that work with users in real time 3.
  • Cerebras says its wafer-scale architecture can answer up to 15 times faster than GPU-based systems by keeping compute plus memory on a single wafer-scale processor 2.

Cerebras adds another supplier in a broader compute mix

  • The 750-megawatt Cerebras rollout sits alongside a 10-gigawatt Nvidia project and plans to deploy 6 gigawatts of AMD GPUs 1.
  • Large AI companies are moving away from dependence on one chip supplier and building a wider compute roster 1.
  • Data center operators pair hardware with the job, using Cerebras for low-latency inference while other architectures handle training or general capacity needs 3.
  • The infrastructure market is settling into clearer roles, which opens separate lanes for chip designers to compete 3.

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