Musk plans Tesla AI chip factory, considers Intel partnership

Tesla CEO Elon Musk said the company may need to build a large-scale chip fabrication plant to meet the demand for AI chips, and is open to discussing a potential partnership with Intel.

Musk made the remarks during Tesla’s annual meeting, stating that current supplier capacity will not be enough for the company’s requirements.

He noted Tesla is developing its fifth-generation AI chip, which will power its autonomous driving systems, and continues to work with TSMC and Samsung for chip production.

Musk said initial production of the new AI5 chip is expected in 2026, with full-scale manufacturing possibly starting in 2027.

He added that a future AI6 chip could double performance and reach volume production by mid-2028.

🔗 Source: Reuters

🧠 Food for thought

Implications, context, and why it matters.

Tesla chip plans face a 2–3 year ramp-up

Building an advanced semiconductor fabrication plant (fab) costs $15–$20 billion and needs 2–3 years to hit stable output after construction 1. A 2027 goal for full-scale AI5 manufacturing looks tight, even if work started today.
At 3-nanometer (3nm), a wafer runs $20,000–$25,000, while chip design can hit $500 million to $1 billion for top-end parts 1. These costs push automakers toward partners like TSMC or Intel.
EUV lithography machines cost $350 million each. ASML (a Dutch lithography‑equipment maker) is the only supplier 1. The high price and tight supply could delay Tesla’s schedule amid global competition for EUV tools.

Custom auto AI chips fuel a design-services boom for EDA and verification

If Tesla builds custom silicon, other automakers will speed up their chip plans to keep pace in autonomy. That shift boosts demand for Electronic Design Automation (EDA) tools, intellectual property (IP) core licenses, and functional-safety verification that meets automotive safety standards.
Shift-left design moves testing and validation earlier in the cycle 2. It leans on early checks and AI-driven tuning beyond power, performance. Software and simulation providers can win new work as automakers with little chip design experience seek help.
Chiplet architectures, which connect multiple smaller dies, and advanced packaging are scaling as Taiwan Semiconductor Manufacturing Co. (TSMC) lifts chip-on-wafer-on-substrate (CoWoS) capacity from 35,000 to 90,000 wafers per month by 2026 2. That growth lets packaging and interconnect specialists help automakers pursue modular designs without full fab builds.