Broadcom launches new processor in AI chip race

Broadcom has launched a new networking processor called the Tomahawk Ultra, aimed at improving data processing for AI applications.

The Tomahawk Ultra functions as a traffic controller for data transfer between chips in data centers, such as those located in a single server rack.

According to Broadcom, this chip can connect four times as many chips as Nvidia’s NVLink Switch, a competing product.

Unlike Nvidia’s proprietary system, the Tomahawk Ultra employs an enhanced version of Ethernet for faster data transfer.

Manufactured by TSMC with 5-nanometer technology, the chip took three years to develop.

Initially built for high-performance computing, the Tomahawk Ultra was later optimized for growing AI needs.

Broadcom targets the “scale-up” AI market and works with companies like Google to offer alternatives to Nvidia’s GPUs.

🔗 Source: Reuters

🧠 Food for thought

1️⃣ AI has shifted the semiconductor industry from compute to connectivity

The Tomahawk Ultra represents a fundamental shift in AI infrastructure priorities where data movement between chips has become as critical as the processing power of the chips themselves.

As AI models have grown exponentially in size and complexity, the industry has hit communication bottlenecks when connecting hundreds of processors together, making networking technology increasingly valuable.

This evolution explains why Broadcom, traditionally known for networking products, can now challenge Nvidia in the AI space by focusing on the critical “scale-up” computing challenge of connecting up to 1,024 accelerators compared to Nvidia NVLink’s 72 accelerator limit 1.

The chip’s 250 nanosecond latency capability at 51.2 Tbps throughput specifically addresses the technical requirements of large-scale AI training, where microseconds of delay can significantly impact overall system performance 2.

This networking-centric approach to AI infrastructure reflects how the bottlenecks in AI computing have evolved from raw computational power to the efficiency of data movement between processing units.